High-speed communications such as 40 Gbps (gigabit per second) and 100 Gbps per wavelength are being put to practical use in order to increase the capacity of optical communication networks along with the increase in data traffic. As a technology for achieving high-speed optical communications, a technology of fabricating a fine optical waveguide structure with silicon photonics technology to integrate an operation circuit and an electric/optical conversion circuit in one chip has attracted attention. In an optical modulator of silicon photonics, a voltage is applied to a PN junction formed in the center of the waveguide, and the optical path length is changed by utilizing a change in carrier density, that is, a change in refractive index (carrier plasma dispersion). Since the change in the refractive index is proportional to the change in the carrier density, it is desirable to change the carrier density with a smallest possible voltage change. In the PN junction, when a bias voltage is applied in a forward direction, the change in the carrier density is larger and the modulation efficiency is better. However, the bandwidth is narrow in such a configuration. In view of the driver, the junction capacitance of the optical modulator appears as load capacitance, the high frequency component signal attenuates and the band deteriorates. When a pin diode is used, the junction capacitance is larger, and the characteristics in the high frequency band become worse as a result.
In order to prevent degradation of a band in an optical modulator driven at high speed, a method of inserting a matching circuit formed by disposing a capacitor (C) and a resistor (R) between a driver circuit and an optical modulator has been proposed (e.g., see Non-Patent Document 1). In this method, the junction capacitance of the pin diode is reduced to the design capacity of the optical modulator by inserting a matching circuit electrically equivalent to the PN junction of the optical modulator.